(a) Field of the Invention
This inventive concept relates generally to semiconductor techniques, and more specifically to a semiconductor device and manufacture thereof.
(b) Description of the Related Art
Semiconductor devices are being made increasingly dense in a wafer, the size of each individual device and the gap between neighboring devices have been substantially decreased. While smaller device size increases the circuit density, it also brings new challenges in the manufacturing process. To compensate for reduced capacitance as a result of smaller device size, the capacitor need to be made higher, or be made into a cylinder or a concave shape. As the size of a contact apparatus or a via hole decreases, it becomes increasingly difficult to completely fill those contact holes due to their high aspect ratio.
FIGS. 1A and 1B show schematic diagrams of one example of using a conventional semiconductor manufacturing method to form a contact apparatus. Referring to FIG. 1A, first, a dielectric layer 12 is formed on a substrate 11, an anti-reflective layer 13 is formed on the dielectric layer 12, then the structure on the substrate 11 is patterned to form an opening that goes through the anti-reflective layer 13 and the dielectric layer 12 and exposes a portion of the substrate 11. Then, a compound layer is formed on the upper surface of the substrate 11, wherein the compound layer comprises a titanium layer 14 and titanium nitride layer 15. Using Chemical Vapor Deposition or other suitable deposition methods, a tungsten layer 16 may be deposited on the supper surface of the substrate 11 to form a contact apparatus. Because the side surfaces of the opening are perpendicular to the upper surface of the anti-reflective layer 13, an overhang 17 may be formed on the upper part of the opening during the deposition of the tungsten layer 16, which forms a hollow hole 18 in the tungsten layer 16.
Then, perform a Chemical Mechanical Polishing (CMP) process on the upper surface of the structure in FIG. 1A to expose the dielectric layer 12, as shown in FIG. 1B. Because of the existence of the hollow hole 18 in the tungsten layer 16, an impurity 19 might enter the hollow hole 18 during the CMP process, which will severely affect the performance of the resulted semiconductor device.
Therefore a new semiconductor manufacturing method that can eliminate or reduce hollow holes in the contact apparatus, thus improve the quality of the resulted semiconductor device, is desirable.